| encryptor_test Project Status (11/03/2014 - 21:11:39) | |||
| Project File: | Encryptor.xise | Parser Errors: | No Errors |
| Module Name: | encryptor_test | Implementation State: | Programming File Not Generated |
| Target Device: | xc3s500e-4fg320 |
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| Product Version: | ISE 14.7 |
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| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| Environment: | System Settings |
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| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Mon Nov 3 20:42:05 2014 | ||||
| Translation Report | ||||||
| Map Report | ||||||
| Place and Route Report | ||||||
| CPLD Fitter Report (Text) | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| ISIM Simulator Log | Out of Date | Mon Nov 3 21:18:30 2014 | |
| WebTalk Report | Out of Date | Mon Nov 3 21:11:39 2014 | |
| WebTalk Log File | Out of Date | Mon Nov 3 21:11:39 2014 | |